By Carlos Ortet · From 498A, a European AI lab · May 23, 2026

Isometric illustration of a diplomatic negotiation table surrounded by integrated circuits, server racks and data centers, symbolizing the global supply chain of AI chips.
Illustration: Tara Jacoby.

Every AI chip that trains a model at OpenAI, Anthropic or Mistral needs a set of mirrors polished in a German factory, a chemical resin mixed in a Japanese laboratory, and a packaging building in Taiwan whose waiting list runs past a year. Without any one of these three elements, the chip does not exist. None of them is American or Chinese.

Almost nobody describes this international fabric: the supply chain of an advanced processor depends on the coordinated work of more than thirty countries. Not two. What are they really talking about, then, when they talk about the “chip war”? The narrative that frames artificial intelligence as an arm-wrestle between the United States and China hides the real map, which is far more interesting: a global fabric of crossed technical monopolies in which no one controls the complete system and where any attempt to break it ends up striking back at the breaker.

It is worth understanding that map for two reasons. First, because it explains why the fragmentation many analysts take for granted is, in fact, physically impossible without costs no government is willing to pay. Second, because Europe is already inside that fabric as a critical node, and almost no one on the continent appears to have noticed.

And there is a third reason, less technical and more political. If we accept the narrative in which Europe has no voice, no vote and no leverage in AI, we resign ourselves to being irrelevant when we are not. We have the capability —and, it bears saying, also the responsibility— to play a key role in how artificial intelligence evolves over the next ten years. Resigning before starting is a choice, and it is not the one the real map allows us to make.

What you need to know

  • A single advanced chip fab depends on materials, equipment, software and know-how from more than 30 countries. The “US-China war” hides this structural interdependence.
  • The real bottleneck of global AI is not the chip, it is CoWoS packaging: three TSMC buildings in Taiwan with waiting lists of 52 to 78 weeks.
  • The Pentagon, OpenAI and Mistral all depend on the same German industrial optician: Carl Zeiss SMT is the sole world supplier of EUV mirrors.
  • Europe already holds five or six technical monopolies in the chain. If it played as a bloc, it would be indispensable. The right strategy is not “self-sufficiency”; it is indispensability.
  • ASML bought 11% of Mistral for €1.3 billion in September 2025. European compute + IP integration is already happening, quietly.
  • The original Chips Act failed in part — Intel Magdeburg was cancelled in July 2025 — but Chips Act 2.0 (Q2 2027) could give the Commission direct authority to invest in fabs.
  • Trump rescinded the AI Diffusion Rule in May 2025 because it treated NATO allies as Tier 2. The US government itself acknowledged that its own policy was tearing the allied fabric apart.

The dominant narrative

The world’s chip manufacturing system rests on eight linked dependencies. Before a single atom of silicon is touched, the chip is designed in EDA software (Electronic Design Automation), where three companies concentrate over 90% of the market: two American — Synopsys and Cadence — with around 30% each, and Siemens EDA with about 13%. Every chip designed on Earth — any Apple processor, any custom ASIC, any Nvidia GPU — flows through one of these three software packages. The reason is brutal: mathematically proving that a chip with billions of transistors will work before manufacturing it is not something you do anywhere. A respin — redoing the design because something failed — costs between $50 and $100 million on an advanced node, and more than 60% of first-time designs require one. Synopsys and Cadence are wealthy precisely because they charge to avoid the inevitable.

Second dependency: silicon wafers. The 300 mm discs that serve as foundation. They must be produced at 99.999999% purity. Only two companies make them at industrial scale: Shin-Etsu Chemical and Sumco, both Japanese. Together they control roughly half of the critical 300 mm segment. Their advantage is inherited: decades of precision manufacturing dating back to the 1970s, chemical and equipment suppliers clustered in the same industrial region, and a culture of lot-to-lot consistency that no one has replicated.

Third dependency: photoresist, the chemical “ink” applied to the wafer so light can draw the circuit. For EUV (extreme ultraviolet lithography), the same brutal 99.999999% purity, but in a liquid compound. What the popular telling suggests — that Japan has “100% of the monopoly” — is overstated: it is in fact a Japanese-Korean oligopoly where JSR holds around 22% and the top five makers account for about 50% of the market. The nuance does not change the conclusion: dependency is concentrated in a single region, and in 2019 Japan restricted exports to South Korea, threatening Samsung and SK Hynix. The precedent is on the record.

Fourth: process gases. Here Ukraine enters: before 2022 it produced roughly 50% of the world’s neon and supplied up to 90% of the neon consumed by the US semiconductor industry. The reason is historical. The USSR built large-scale steel mills to feed its military complex, and those mills captured neon as a by-product. Two Ukrainian companies inherited and perfected the purification. When the Russian invasion of February 2022 paralysed those plants, neon prices spiked. China stepped in as a replacement and POSCO in South Korea announced expansion, but the market is still rebalancing.

Fifth, the most famous: ASML. The Dutch company headquartered in Veldhoven is the only firm in the world that builds EUV lithography machines. 100% of the market. Each machine costs about $180 million in its current low-NA generation and the new High-NA — already installed at Intel, Samsung, SK Hynix and IMEC — runs around $380 million. Each unit contains over 100,000 components; ASML makes 15%, the rest comes from more than 5,000 suppliers. The two critical ones are German and American: Carl Zeiss SMT, sole world supplier of EUV mirrors, and Cymer, in California, sole maker of the laser source that generates EUV light. ASML acquired Cymer in 2013, but its technology remains US-origin. That is the legal lever by which Washington can prevent ASML from selling to China: the Foreign Direct Product Rule. That is also why China cannot build top-tier AI chip fabs.

Sixth: etch, deposition, inspection. After each lithography step, you carve, deposit and verify. The United States dominates here through Lam Research and Applied Materials — together around 60% of dry etch — and through KLA, the world reference in process inspection. Tokyo Electron, Japanese, leads thermal processing and, more importantly, controls 100% of the coaters and developers that accompany every EUV scanner. Without this quality-control layer, no fab knows whether what it is producing actually works. In April 2026, the US government extended its China export bans to this equipment.

Seventh: photomasks and pellicles. The templates that lithography projects. Canon and Shin-Etsu supply the dust-protection membranes, but one Japanese company — Lasertec — controls 100% of the world market for actinic mask inspection at 5 nm or below. A 1,460-employee firm with technical veto power over the entire advanced production of the planet.

Eighth and most visible: the foundries. TSMC in Taiwan reached a record 70.2% of the global foundry market in Q2 2025. Samsung sits at 7.3%, down from 12% a year earlier, with yields near 50% on 3 nm GAA versus TSMC’s 90%. SMIC in China is capable but blocked by export controls. When Morris Chang founded TSMC in 1987, he bet that chip companies would prefer not to own fabs. He was right. Apple designs chips. Nvidia designs chips. Neither builds them.

RedChalk Group infographic of the complete semiconductor value chain: equipment makers (Lam, KLA, TEL, Applied Materials, ASML, SUSS), fabless (Nvidia, AMD, Qualcomm, Apple), foundries (TSMC, GlobalFoundries, Samsung, SMIC, UMC) and OSATs (ASE, Amkor, JCET).
The complete semiconductor value chain. Source: RedChalk Group.

This is the map that appears in every serious analysis. It is what Council on Foreign Relations analysts repeat, what Bloomberg explainers illustrate, what Morris Chang cites in interviews. And yet, without being an expert, I get the impression that it is incomplete.

The half that nobody tells

Infographic showing the 5 stages of advanced AI chip manufacturing: design, EUV photolithography by ASML, wafer fabrication at TSMC, CoWoS packaging, and final test.
The 5 physical stages of an AI chip: design, lithography, wafer, packaging, test. The real bottleneck is CoWoS packaging, not the chip itself. Infographic: GEOradar / 498A.

Half the chain is missing. The half that actually determines how many AI models the world can train each quarter.

Nvidia’s real bottleneck is not the chip. It is the packaging. Every H100, H200 and B200 GPU delivered for AI training passes through a TSMC technique called CoWoS (Chip-on-Wafer-on-Substrate). At the end of 2023, TSMC produced 13,000 monthly wafers of CoWoS. The target for the end of 2026 is 120,000 to 130,000: a tenfold capacity increase in three years. Even so, it is not enough. Nvidia has reserved more than 50% of all CoWoS capacity for 2026. The three fabs TSMC dedicates to this — AP3, AP5 and AP6 — are saturated, with lead times of 52 to 78 weeks. The consequence is elegant: even if you have a wafer slot in N3, the chip does not ship without CoWoS. The real bottleneck of global AI is three packaging buildings in Taiwan. AMD lives a parallel story, worse: its MI300X uses a different technique, SoIC, with significantly more limited capacity.

52-78
weeks of waiting time for CoWoS at TSMC’s three dedicated fabs (AP3, AP5, AP6), all saturated.

>50%
of total 2026 CoWoS capacity already reserved by Nvidia. The rest is shared between AMD, Google, AWS and Broadcom.

485 → 950
TWh of electricity that global data centres will consume between 2025 and 2030, per the IEA. The US and China generate 80% of the growth.

€1.3B
that ASML invested in Mistral in September 2025, securing 11% of the most promising European AI lab.

The second invisible bottleneck is HBM memory (High Bandwidth Memory). Every modern AI GPU carries stacks of memory chips piled vertically with brutal bandwidth. The market grew from $17 billion in 2024 to about $34 billion in 2025: it doubled in twelve months. Micron’s projections put it at $100 billion in 2028. Something else happened almost no one is underlining: in Q3 2025, SK Hynix held 57% of the HBM market, Samsung 22% and Micron 21%. SK Hynix became the world’s number one in DRAM for the first time, overtaking Samsung for the first time since 1983. AI has just reordered four decades of Korean memory hierarchy.

The third invisible bottleneck is software: CUDA. Nvidia controls over 90% of the data centre GPU market for AI, but the real moat is not silicon.

In 2006 Nvidia launched CUDA, a platform that lets programmers use GPU power for complex mathematical computations (essential for AI). They have been refining it for nineteen years, and that time has hardened into three layers of lock-in no rival has matched:

cuDNN, cuBLAS, NCCL. Hyper-specialised libraries — pre-built tools — that make AI run at the speed of light on Nvidia hardware. Every frequent mathematical operation in deep learning is already optimised to the limit inside these libraries.

Integration with PyTorch and TensorFlow. The two “languages” data scientists use worldwide are designed to integrate flawlessly with Nvidia from day one. Use another brand and programming becomes a nightmare of errors and patches.

Documentation and community. Nineteen years of manuals, tutorials, forums and university courses. Migrating off CUDA is not just switching GPUs: it is retraining an entire generation of engineers.

AMD ROCm closed the hardware gap in 2025, but the software maturity gap is still there. Intel oneAPI, the UXL Foundation backed by ARM, Samsung and Qualcomm, and emerging proposals like MLX, Modular Mojo, Triton and JAX all try to erode the lock-in. But as of May 2026, none has produced a material shift. The moat is cultural before it is technical.

The fourth bottleneck is not technology, it is geology. China controls more than 85% of global rare earth processing, about 98% of dysprosium and between 79 and 80% of tungsten — an element with no substitute in the interconnect, contact and barrier layers of advanced chips. A tungsten supply disruption would reduce new wafer starts in six to eight weeks. The International Energy Agency projects that in 2030 China will control 51% of rare earth production and 76% of refining. And here is the move almost no one tells: between July 2023 and April 2025, China imposed successive export restrictions on gallium, germanium, graphite, antimony, tungsten, tellurium and seven medium-heavy rare earths. It was a counter-lever to US chip controls. In November 2025, following a bilateral Xi-Trump agreement, China partially suspended those controls for US end users until November 2026. The dependency is mutual and forces constant bilateral mechanisms.

The fifth bottleneck is physical: electricity and water. The IEA projects global data centres going from 485 TWh in 2025 to 950 TWh in 2030 — about 3% of global electricity demand, with the AI portion tripling. The US and China generate 80% of that growth. The race for power has led Microsoft to sign a 20-year PPA with Constellation to reopen Three Mile Island Unit 1 — the largest PPA in US electric history — and serve 835 MW exclusively to AI from 2027. Amazon extended its nuclear deal with Talen to 1,920 MW. Google signed with Kairos Power for 500 MW of small modular reactors. For the first time, hyperscalers control dedicated nuclear generation. A new axis of dependency and power.

And water. Google’s data centres went from 4.3 billion gallons in 2021 to 6.1 billion in 2024, a 42% increase in three years. The Council Bluffs site in Iowa consumes in one year the equivalent of five days of the state’s total residential consumption. In some areas, data centres use more than 25% of local water supply.

RedChalk Group table with the five key semiconductor trends for AI and their beneficiaries: high-volume production, advanced packaging, edge AI, AI-optimized memory, and increased demand for advanced lithography equipment.
Key semiconductor trends for AI and their main beneficiaries. Source: RedChalk Group.

This is the half that goes untold. Add it to the official half and the entire map shifts. The interesting question stops being “who controls the chip” and becomes “who cannot do without whom”. The answer is that nobody can do without anybody.

Europe should take itself much more seriously

Dominant semiconductor narratives almost always mention Europe in one of two ways: as a vaguely irrelevant observer, or as the home of ASML. Both descriptions are wrong.

Five or six European technical monopolies are today indispensable for the global chain. ASML, with 100% of the EUV lithography market, is only the most visible. Alongside it, Carl Zeiss SMT — whose revenue went from €1.2 billion in 2016 to €4.1 billion in 2024, multiplying 3.4× in eight years — is the sole world supplier of EUV mirrors. Without Zeiss, there are no AI chips. SOITEC, in France, controls between 70 and 80% of the global SOI wafer market, essential for RF in 5G smartphones and for power electronics in automotive. Infineon is the world number one in automotive semiconductors (13.5% share) and number one in microcontrollers (32%), with revenue close to €15 billion. Bosch leads the world in MEMS with around $2 billion and 12% year-on-year growth. ARM, owned by SoftBank but designed in Cambridge, totals more than 300 billion cumulative chips shipped on its architecture. And AT&S in Austria is the only European player in the global top five for ABF substrates.

If all of that counted as a bloc, Europe would already be indispensable. It is. But no one tells it that way.

To that list one must add IMEC in Leuven, Belgium, probably the most underappreciated European asset in the sector and, without much argument, the most important semiconductor R&D centre in the world. Its value lies in its neutrality: because Belgium has no chip industry of its own, fierce rivals — TSMC, Intel, Samsung, GlobalFoundries, Infineon, STMicroelectronics, Panasonic, Texas Instruments and NXP — collaborate there without suspicion on pre-competitive research. More than 5,500 engineers and researchers, many assigned on-site by member companies. Revenue of €1.034 billion in 2024. In March 2026 IMEC secured an EXE:5200 unit from ASML — exclusive access to the latest High-NA technology — to qualify sub-2 nm lithography in Q4. It is the first test bench in the world for every generation.

The geopolitical risk is direct: if the world fragments under political tension, this global collaboration dies. Without IMEC coordinating basic research, the global advance of computing power stalls. And the three fiercest rivals in the sector — TSMC, Intel and Samsung — lose simultaneously.

ASML buys Mistral: the move we talked about little and that meant a lot

In September 2025 something happened that should have dominated front pages across the European Union. It did not. ASML led a €1.7 billion round in Mistral, the French AI lab, investing €1.3 billion for 11% of the company at an €11.7 billion valuation. ASML CFO Roger Dassen joined Mistral’s strategic committee. In March 2026, Mistral closed another $830 million round for data centres in Paris and Sweden.

This deserves a careful read: the largest European chip company has put money into the largest European AI model. Sovereign compute + IP integration in Europe is already happening, quietly, while public conversation remains focused on the United States and China. How many analysts, policy makers or journalists have paused to think about what that move means? Almost none. And it is one of the most important European industrial decisions of the last ten years.

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When the Chips Act helps and when it does not

The European Chips Act, announced in 2023 with €43 billion, has taken serious hits. Intel cancelled its Magdeburg megafab in July 2025, the central pillar of the plan: €30 billion that were meant to place Europe in advanced production of its own. Federal and Saxony-Anhalt state funds are being redirected to other projects. The easy reading is that the Chips Act failed.

The hard reading is more interesting: the Chips Act adds value when it reinforces ecosystems that already work, and subtracts when it tries to create from scratch capacity that clashes with the sector’s global economics. ESMC, the joint venture between TSMC, Bosch, Infineon and NXP in Dresden, is active: €10 billion with €5 billion in approved state aid, target capacity of 40,000 monthly wafers in FinFET by 2029, production in 2027. GlobalFoundries invested an additional €1.1 billion and expects to exceed one million annual wafers by end-2028 — Europe’s largest capacity in its category. Infineon is building a Smart Power Fab in Dresden for €5 billion, ramping in 2026. Silicon Saxony already manufactures one in three European chips and has attracted more than €16 billion in mega-fab investments. It is proof that the cluster model works outside Asia when you choose where to invest carefully.

The Chips Act 2.0, whose roadmap was presented in April 2026 and whose formalisation is expected in Q2 2027, could give the European Commission direct authority to invest in fabs. The 27 member states have asked to elevate semiconductors to strategic category equivalent to defence and aerospace. Bruegel puts it precisely: the right European strategy is not “self-sufficiency”, it is “indispensability” — turning the five or six European monopolies into non-negotiable levers of the global fabric, not building defensive replicas of Asia.

The paradox of decoupling

There is a paradox at the centre of all this that deserves naming. Advocates of US-China decoupling argue that mutual dependency is a geopolitical risk that must be eradicated. Advocates of interdependence argue that decoupling is physically unfeasible. I think both have some of the right of it: both powers spend hundreds of billions attempting a decoupling — or technological independence — that no technical expert deems possible.

The proof is in recent events. In May 2025, the US government rescinded Biden’s AI Diffusion Rule — the three-tier regime that was going to determine who could buy advanced chips — because it treated Portugal, Austria and other NATO allies as Tier 2, restricting their access. In other words: the very government that designed the policy acknowledged it was tearing its own allied fabric apart. In November of the same year, China partially suspended export controls on gallium, germanium and tungsten for US end users following a bilateral agreement with Trump. In January 2026, Trump announced 25% tariffs on re-exported chips and, simultaneously, a $250 billion deal with Taiwan to relocate 40% of the supply chain to the US or, alternatively, tariffs of up to 100%. All of the above is the opposite of a coherent industrial policy: it is the successive management of a dependency nobody knows how to end.

IMEC works because none of these measures has touched it. In a single facility in Leuven, TSMC, Intel and Samsung — the sector’s three fiercest rivals — research together. None of them can afford not to. If IMEC were broken by geopolitical pressure, Moore’s Law would break with it, and all three would lose simultaneously.

The chip war is a narrative myth. The bottleneck is technical, not geopolitical. And cooperation is not ideology: it is the only physical way the system works.

Our view from a small lab in Barcelona

At 498A we work with European clients on AI, GEO and information architecture for LLMs, and we see how indispensable this technology has become — and how it turns into a critical element for our clients to stay competitive. It is a curious moment: corporate-grade solutions are not yet available, while small companies are free to integrate frontier technology into their processes. It is a window that will close in months, or a year, but it is a curious situation nonetheless.

European technical capacity is not lacking. European talent is not lacking. We know that a significant part of the talent running Silicon Valley and Hsinchu passed through European universities, and that key pieces of LLM technology are built on the work of labs in Paris, the UK and elsewhere. What is lacking is coordination, speed, a public conversation that recognises we are already a critical node in the global fabric and, above all, determination.

Our hopes and operational intentions for the next 24 months:

1. Stop thinking in terms of “self-sufficiency”. Europe does not have to replicate TSMC or Nvidia. It has to turn the technical monopolies it already holds into non-negotiable levers. Indispensability, not autarky.

2. We would love to see the Chips Act 2.0 accelerate. The April 2026 roadmap goes in the right direction — semiconductors as a category equivalent to defence, direct Commission investment authority — but it arrives late. Brussels needs the speed of a start-up to make a decision of the scale of a superpower.

3. Tell better what is already happening. ASML’s investment in Mistral deserved front-page coverage in every European business daily. It did not get it. High-NA qualification at IMEC deserves systematic analysis from every think tank. It is not getting it either. If Europe keeps describing itself as an observer, it will keep behaving as an observer — despite holding the pieces to be a protagonist.

We are all one

As we said at the start: every AI chip in the world needs a set of mirrors polished in a German factory, a chemical resin mixed in a Japanese lab and a packaging building in Taiwan whose waiting list runs past a year. And each of those three elements depends, in turn, on rare earths refined in China, design software written in California, wafers polished in two other Japanese plants, gases captured in Ukraine and, increasingly, nuclear electricity bought from US plants reopened specifically to serve AI. It is a fabric. Not a war.

Washington and Beijing spend hundreds of billions of dollars trying to prove otherwise. Every time they push that narrative, the fabric responds with a bilateral agreement that acknowledges pure fragmentation is not viable. Europe has an uncommon opportunity: to be the region that articulates that reading explicitly, makes industrial policy on top of it, and occupies the place the chain already grants it.

At 498A that is what we work on. A European AI lab with global impact is not aspirational: it is the natural consequence of a continent that already holds critical technical monopolies and only needs to reclaim the role the chain has assigned it. If you find the geopolitics of AI interesting and want to learn with us how it translates into real industrial decisions and concrete opportunities, follow 498advance.

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Glossary

ASML — Advanced Semiconductor Materials Lithography. Dutch company headquartered in Veldhoven, sole world maker of EUV lithography machines. In 2025 it invested €1.3 billion in Mistral.

Carl Zeiss SMT — Subsidiary of the German Zeiss group specialising in semiconductor optics. Sole world supplier of the EUV mirrors that ASML integrates into its scanners. 2024 revenue: €4.1 billion.

EU Chips Act — €43 billion European plan announced in 2023 to boost semiconductor production in Europe. Partially failed after Intel’s Magdeburg cancellation in July 2025; Chips Act 2.0 in preparation for 2027.

CoWoS — Chip-on-Wafer-on-Substrate. TSMC’s advanced packaging technique needed to produce Nvidia’s H100, H200 and B200 GPUs. The real bottleneck of global AI, with lead times of 52 to 78 weeks as of May 2026.

CUDA — Nvidia’s parallel computing and programming platform. The real moat is 19 accumulated years of libraries (cuDNN, cuBLAS, NCCL) and integration with PyTorch and TensorFlow. No comparable equivalent as of May 2026.

EDA (Electronic Design Automation) — Software for designing chips. Synopsys (~30%), Cadence (~30%) and Siemens EDA (~13%) control more than 90% of the global market.

EUV (Extreme Ultraviolet Lithography) — Lithography technology using extreme ultraviolet light, necessary to manufacture nodes at 7 nm or below. Monopolised by ASML.

Foreign Direct Product Rule — US legal rule that allows Washington to regulate the export of foreign products if they contain or are made with critical US-origin technology. Legal basis of the China blockade.

HBM (High Bandwidth Memory) — Very high bandwidth memory stacked vertically, essential for AI GPUs. Market: $17 billion in 2024, $34 billion in 2025. SK Hynix leads with 57% in Q3 2025.

High-NA EUV — New generation of ASML EUV machines (EXE:5200B model), with higher numerical aperture. Cost around $380 million per unit. First commercial customer: Intel.

IMEC — Nanoelectronics R&D centre based in Leuven, Belgium. The only place in the world where TSMC, Samsung, Intel, GlobalFoundries and major European players research together pre-competitively. 2024 revenue: €1.034 billion.

Lasertec — 1,460-employee Japanese company controlling 100% of the global market for actinic EUV mask inspection at 5 nm or below.

Mistral AI — French AI lab founded in 2023. Valued at €11.7 billion after the September 2025 round led by ASML.

Photoresist — Chemical “ink” applied to the silicon wafer so light can draw the circuit pattern. Japanese-Korean oligopoly dominated by JSR, TOK, Shin-Etsu and others.

PPA (Power Purchase Agreement) — Long-term electricity purchase agreement. Microsoft signed the largest PPA in US electric history with Constellation to reopen Three Mile Island.

SOI (Silicon-on-Insulator) — Wafer technology with an insulating layer. SOITEC controls 70-80% of the global market. Critical for RF in 5G smartphones and power electronics.

SOITEC — French company headquartered in Bernin. Near monopoly on the global SOI wafer market. Plants in France, Singapore and China.

Stargate — $500 billion AI infrastructure plan announced in January 2025 by OpenAI, Oracle, SoftBank and MGX. Flagship operational in Abilene, Texas. Extensions announced in the UAE, Argentina and Norway.

TSMC — Taiwan Semiconductor Manufacturing Company. Founded by Morris Chang in 1987. 70.2% of the global foundry market in Q2 2025. Headquartered in Hsinchu.

498A — European AI lab. R&D division focused on applied research in generative AI, GEO and information architecture for LLMs.

Frequently asked questions

Why can’t China build top-tier AI chips with all its money and industrial capacity?

Because it has no access to ASML’s EUV lithography machines, the world’s only maker. The legal reason is the Foreign Direct Product Rule: the machines contain laser technology of US origin (Cymer, owned by ASML), which gives Washington veto power over exports. SMIC, China’s main foundry, produces capable chips for the domestic market but not the most advanced generation that frontier generative AI requires.

What is CoWoS and why is it Nvidia’s real bottleneck?

CoWoS (Chip-on-Wafer-on-Substrate) is an advanced packaging technique developed by TSMC that combines the logic chip (the GPU) with the HBM memory in a single package. Every Nvidia H100, H200 and B200 needs CoWoS. World capacity is concentrated in three TSMC fabs in Taiwan, all with 52-78 week lead times and more than 50% reserved by Nvidia for 2026. Without CoWoS, there is no modern AI GPU — even if you have a wafer slot in N3.

What is Europe’s real role in the AI chip chain?

Europe controls five or six critical technical monopolies: ASML (100% of the EUV market), Carl Zeiss SMT (100% world supply of EUV mirrors), SOITEC (70-80% of SOI wafers), Infineon (#1 world in automotive and MCUs), Bosch (#1 world in MEMS), ARM (300+ billion chips cumulative on its architecture) and AT&S (only European in the top 5 ABF substrates). In addition, IMEC in Leuven is the only world centre where TSMC, Samsung and Intel research together pre-competitively. Europe is already indispensable, even if it does not tell itself so.

What did ASML’s investment in Mistral mean in September 2025?

ASML led a €1.7 billion round in Mistral, investing €1.3 billion for 11% of the company at an €11.7 billion valuation. ASML CFO Roger Dassen joined the strategic committee. It is one of the most important European industrial decisions of the last decade: the largest European chip company put money into the largest European AI model. Sovereign compute + IP integration in Europe is already happening, even if almost no one covered it in full proportion.

What is the real status of the EU Chips Act in May 2026?

Mixed. Intel cancelled its Magdeburg megafab in July 2025 — the central pillar of the original plan. But ESMC (TSMC-Bosch-Infineon-NXP JV) is active in Dresden, GlobalFoundries is expanding capacity in the same location, and Infineon is building a Smart Power Fab for €5 billion. Silicon Saxony already manufactures one in three European chips. The Chips Act 2.0, expected for Q2 2027, could give the Commission direct investment authority and elevate semiconductors to strategic category equivalent to defence.

How much electricity does AI consume and where does it come from?

The IEA projects global data centres going from 485 TWh in 2025 to 950 TWh in 2030 — about 3% of global electricity demand, with the AI portion tripling. The US and China generate 80% of the growth. Hyperscalers are signing dedicated nuclear deals: Microsoft with Constellation to reopen Three Mile Island (835 MW from 2027), Amazon with Talen (1,920 MW through 2042) and Google with Kairos Power (500 MW of small modular reactors). For the first time, AI companies control dedicated nuclear generation.

Is AI really a “war” between the United States and China?

No, not in strict technical terms. The production chain depends on more than 30 countries and on technical monopolies spread across the Netherlands, Germany, Japan, Taiwan, South Korea, the US and Belgium. Both the US and China depend on the same five or six suppliers located in third countries. Decoupling attempts translate into costs borne by both sides and are systematically reversed via bilateral agreements — the AI Diffusion Rule rescission in May 2025, the partial suspension of Chinese rare earth controls in November 2025. The “war” narrative hides the real map: an interdependent fabric no power can leave without prohibitive cost.


Carlos Ortet is a senior innovation engineer, CEO of Zoopa and director of 498A. He works on applications of generative AI, GEO (Generative Engine Optimization) and information architecture for LLMs with European organisations.

Cover illustration: Tara Jacoby. Semiconductor value chain infographics: RedChalk Group. Data verified with Bloomberg, FT, SEMI, IDC, TrendForce, IEA, CSIS and Bruegel, May 2026.